Design of Low Power Digit-serial Adder Filter
نویسندگان
چکیده
منابع مشابه
Low - Power Digit - Serial Multipliers
Digit-serial implementation styles are best suited for implementation of digital signal processing systems which require moderate sampling rates. Digit-serial multipliers obtained using traditional unfolding techniques cannot be pipelined beyond a certain level because of the presence of feedback loops. In this paper, an alternative approach for the design of digit-serial multipliers is present...
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Digit-serial architectures obtained using traditional unfolding techniques cannot be pipelined beyond a certain level because of the presence of feedback loops. In this paper, a novel design methodology is presented which permits bit-level pipelining of the digit-serial ar-chitectures. This enables bit-level pipelining of digit-serial architectures thereby achieving sample speeds close to corre...
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Cochlea devices are powered up with the help of batteries and they should possess long working life to avoid replacing of devices at regular interval of years. Hence the devices with low power consumptions are required. In cochlea devices there are numerous filters, each responsible for frequency variant signals, which helps in identifying speech signals of different audible range. In this pape...
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Many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation that dominates the complexity of Digital Signal Processing (DSP) systems. On the other hand, digit-serial architectures offer alternative low-complexity designs, since digit-serial operators occupy less area and are independent of the data word length. This...
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ژورنال
عنوان ژورنال: International Journal of Electronics and Communication Engineering
سال: 2015
ISSN: 2348-8549
DOI: 10.14445/23488549/ijece-v2i10p103